1. Field of the Invention
The present invention relates to a speed control circuit for a servo motor and more particularly, to a speed control circuit for a servo motor which counts frequencies generated in response to a revolution of the servo motor and converts the frequency to a control voltage of the servo motor.
2. Description of the Prior Art
FIG. 1 is a block diagram of a conventional speed control device for a servo motor. As shown in FIG. 1, the conventional control section 1 receives inputs of a clock signal hereinafter CLK and a frequency generator signal hereinafter FG which are generated in response to a revolution of the servo motor a a speed detecting counter 2 for counting periods of the FG a latch section 3 for latching an output signal of the speed detecting counter 2 with a first control signal from the control section 1, a pulse width modulation signal generating section 4 for carrying out a pulse width modulation over the output signal of the latch section 3 with a control signal from second the control section 1, and a low pass filter 5 for passing only a low band signal of the output signals of the pulse width modulation signal generating section 4. When the FG is inputted to the control section 1, a preset signal is outputted and then applied to the speed detecting counter 2. Accordingly, the speed detecting counter 2 counts the periods of the FG by counting the CLK passing through the control section 1, the count signal is latched in the latch section 3 by a latch control signal of the control section 1, and a pulse width modulation is carried out over the output signal of the latch section 3 at the pulse width modulation signal generating section 4 and then the modulated output signal is outputted as a speed error signal through the low pass filter 5. However, such a conventional device has drawbacks in that it has intricate structures and cannot perform a speed control of the servo motor since a phase delay is made by outputting as an analog signal for controlling the speed error after a removal of carrier components by passing a speed control pulse width modulation signal through the low pass filter.